文献类型：期刊文献

中文题名：功率晶体管直流增益温度变化率的研究及埋层结构优化

英文题名：Study on temperature ramp rate of DC gain of power transistor and optimization of buried layer structure

作者：张华杰[1]

第一作者：张华杰

机构：[1]新乡学院物理与电子工程学院

第一机构：新乡学院物理与电子工程学院

年份：2019

卷号：38

期号：11

起止页码：29-36

中文期刊名：电子元件与材料

外文期刊名：Electronic Components and Materials

收录：CSTPCD;;北大核心:【北大核心2017】；CSCD:【CSCD_E2019_2020】；

基金：国家自然科学基金(U1704132)

语种：中文

中文关键词：功率晶体管;直流增益;高低温变化率;埋层结构;优化

外文关键词：power transistor;DC gain;high temperature and low temperature ramp rate;buried layer structure;optimization

摘要：利用TCAD半导体器件仿真软件,依据NPN型大功率晶体管电参数指标要求,针对直流增益及其高、低温变化率进行了研究.为拓宽满足直流增益要求的结构参数范围并改善直流增益高、低温变化率,提出一种新型带P^+埋层的高反压大功率晶体管结构.仿真结果表明:通过对P^+埋层掺杂浓度和厚度进行优化,可有效折中直流增益和集电极-发射极击穿电压的矛盾关系,使得发射区、基区结构参数在较大范围内满足直流增益指标要求,增大了工艺裕量.P^+埋层的存在,可针对满足直流增益及其高、低温变化率的要求来调整发射区、基区结构参数.
According to the requirement of electrical parameters of NPN type high power transistor, the DC gain and its high temperature and low temperature ramp rate were studied by using TCAD semiconductor device simulation software. In order to broaden the range of structure parameters that meet the requirements of DC gain and improve the ramp rate of high temperature and low temperature of DC gain, a new type of high reverse voltage and high power transistor structure with P^+ buried layer was proposed. The simulation results show that by optimizing the doped concentration and the thickness of P^+ buried layer, the contradiction between the DC gain and the collector-emitter breakdown voltage can be effectively balanced, the structural parameters of the emitter and the base could meet the requirements of the DC gain in a wide range and the process margin could be increased. The existence of P^+ buried layer could adjust the structural parameters of the emitter and the base according to the requirements of DC gain and its high temperature and low temperature ramp rate.